PCBs are, of course, well known in the art and typically include a plurality of dielectric layers having individual conductive layers therein. A typical dielectric layer is known in the industry as “FR4” material which is a fiberglass reinforced polymeric resin material which is provided in layer form and laminated with other layers to form a multilayered PCB final structure. Before such final lamination, each layer is typically circuitized to form a pattern of conductors thereon (e.g., if a signal layer) or the conductor may be in substantially solid form to comprise a power layer for the resulting PCB. Such circuitization may occur following a lamination of the base metal (copper) followed by known processes such as pattern deposition and etching to remove the undesired copper and form the desired pattern of lines and/or pads. Such a procedure, if etching is utilized, is also known as a subtractive process because the conductive material is being removed following initial deposition.
Another process for circuitizing dielectric substrates is referred to as additive plating because layers of the conductive material are built up in the deposited pattern. One advantage of additive processing is the ability to form finer (smaller width, closer spaced) lines, thus assuring the miniaturization strongly emphasized in today's PCB and related packaging products field.
A similar product of more recent vintage than the common PCB is the laminated chip carrier. One such product is produced and sold by the assignee of this invention under the product name HyperBGA (HyperBGA is a registered trademark of Endicott Interconnect Technologies, Inc.). This unique product is much smaller in size than the typical PCB and is used to interconnect a semiconductor chip electrically coupled to a top surface of the product's laminate substrate to a PCB or other substrate on which the substrate is positioned and coupled, e.g., using solder balls. Solder balls or even wirebond connections may be used to couple the chip to the substrate's top conductive surface. Examples of such products are defined in pending applications Ser. No. 10/394,107, filed Mar. 24, 2003, and Ser. No. 10/394,135, also filed Mar. 24, 2003, both assigned to the assignee of the instant invention.
A dielectric material desired for use in newer interconnect products such as laminate chip carriers and even in some PCBs is polytetrafluoroethylene (PTFE), the most common product name for this material being Teflon (Teflon is a registered trademark of E.I. duPont deNemours & Company). Teflon is considered desirable in such an environment because it has a very low dielectric constant, is extremely flexible and thus an excellent material to work with.
One problem of Teflon, however, is that it is considered relatively difficult to plate, especially if using an additive electroless plating operation due to non-optimum adhesion between metals and the dielectric. Understandably, strong adhesion of the final conductive layer (usually copper) is essential for such new products and must satisfy stringent peel and other tests to assure it will be securely attached to its underlayer of dielectric. This is especially true when the copper layer is to have solder balls or the aforementioned wires bonded thereto to form the necessary connections to the chip and/or PCB underneath.
It is believed, therefore, that a circuitized substrate that uses a polymer such as Teflon as its dielectric layer and has a plated conductive layer thereon which will strongly adhere to the dielectric will constitute a significant advancement in the art. It is further believed that a new and unique method of making such a product will also constitute an art advancement.